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Instruction set architecture
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581	:tf/b The CLIPPER® C4 Chipset A Superpipelined, Superscalar Processor Howard Sachs Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:12 Parallel computing Superscalar Central processing unit Scalar processor Instruction set architectures R10000 Alpha 21264 Computer architecture Computer hardware Computing
582	A Parallelizing Compiler for UltraSPARC Chris Aoki Peter Damron Kurt Goebel Vinod Grover Xiangyun Kong Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:47:36 Instruction set architectures Microprocessors CPU cache Cache Computer memory UltraSPARC SPARC Processor register Computer hardware Computer architecture Central processing unit
583	Vector IRAM A Media-enhanced Vector Processor with Embedded DRAM Christoforos Kozyrakis, Joseph Gebis, David Martin, Samuel Williams, Ioannis Mavroidis, Steven Pope, Darren Jones, and David Patterson Add to Reading List Source URL: www.hotchips.org Language: English* - Date: 2013-07-27 23:38:22 Computer hardware Vector processor Processor register MIPS architecture CPU cache Instruction set Joint Test Action Group Computer architecture Central processing unit Computing
584	5.5 GFLOPS Vector Units for “Emotion Synthesis” System ULSI Engineering Laboratory, TOSHIBA Corp. A.Kunimatsu, N.Ide, T.Sato, Y.Endo, H.Murakami, T.Kamei, M.Hirano Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:49:08 Parallel computing Very long instruction word Emotion Engine 64-bit Instruction set 128-bit Computer architecture Instruction set architectures Central processing unit
585	__ ___________________________VME – QuicKit Telephony_ The modular design of our QuicKit product line makes it possible to prototype high-performance, Add to Reading List Source URL: www.cacdsp.com Language: English - Date: 2002-06-04 16:04:39 IEEE standards Instruction set architectures MIPS architecture VMEbus Computing Backplane GreenSpring Computers MIPS Magnum Computer buses Computer architecture MIPS Technologies
586	A History of Modern 64-bit Computing Matthew Kerner [removed] Neil Padgett [removed] Add to Reading List Source URL: courses.cs.washington.edu Language: English - Date: 2007-03-05 13:51:30 Fabless semiconductor companies Instruction set architectures Classes of computers Intel Corporation Parallel computing Advanced Micro Devices Itanium X86 Intel Computer architecture Computing Computer hardware
587	Microsoft Word - EMC data sheet proposal.doc Add to Reading List Source URL: www.nxp.com Language: English - Date: 2015-02-23 09:31:16 Electronic engineering Embedded systems Instruction set architectures Integrated circuits ARM architecture Mbed microcontroller General Purpose Input/Output Joint Test Action Group I²C Electronics Computer architecture Microcontrollers
588	C/C++ Language Extensions for Cell Broadband Engine™ Architecture Version 2.3 CBEA JSRE Series Add to Reading List Source URL: cell.scei.co.jp Language: English - Date: 2009-11-06 03:19:24 Binary arithmetic Addressing mode Find first set Sequence container Array data structure Cell software development X86 instruction listings Computer architecture Computing Cell
589	LPC11E6x 32-bit ARM Cortex-M0+ microcontroller; up to 256 kB flash and 36 kB SRAM; 4 kB EEPROM; 12-bit ADC Rev. 1.2 — 21 May[removed]Product data sheet Add to Reading List Source URL: www.nxp.com Language: English - Date: 2014-05-21 13:02:20 Microcontrollers Embedded systems Instruction set architectures ARM architecture Integrated circuits I²C Joint Test Action Group General Purpose Input/Output ARM Cortex-M Computer architecture Electronics Electronic engineering
590	Microsoft Word - 19-Final-Code-Generation.doc Add to Reading List Source URL: dragonbook.stanford.edu Language: English - Date: 2008-09-08 17:20:29 Subroutines Instruction set architectures Central processing unit MIPS architecture Assembly languages Calling convention Call stack Processor register Stack Computing Computer architecture Software engineering

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